Shortlog

Date Author Message Actions
2019-10-01 18:37 Paul Honig Last commits before reinstalling laptop.master commitdiff tree tar/gz zip patch
2019-08-12 13:06 Paul Honig Merge branch 'master' of github.com:ranzbak/papili commitdiff tree tar/gz zip patch
2019-08-12 11:50 Paul Honig Fixed the rsremote memory interface. commitdiff tree tar/gz zip patch
2019-08-02 22:46 Paul Honig Suppressed even more output from make, because it commitdiff tree tar/gz zip patch
2019-07-30 09:35 Anne Jan Brouwer Removed another /home/paul ;) commitdiff tree tar/gz zip patch
2019-07-29 12:04 Anne Jan Brouwer ont-paul-t commitdiff tree tar/gz zip patch
2019-07-29 11:44 Paul Honig Made the merging of the rom images depend on the b commitdiff tree tar/gz zip patch
2019-07-29 11:26 Paul Honig Add fpga64_main_clock IP clock core. commitdiff tree tar/gz zip patch
2019-07-29 11:25 Paul Honig Changed clock to match the effective 0.877 MHz of commitdiff tree tar/gz zip patch
2019-07-21 18:03 Paul Honig Improved the bootstrap a little more. Implemented commitdiff tree tar/gz zip patch
2019-07-13 19:49 Paul Honig Finally got rid of the 1MHz second clock source.bootstrap commitdiff tree tar/gz zip patch
2019-07-13 13:27 Paul Honig Isolated the bootstap routine from the emulater. commitdiff tree tar/gz zip patch
2019-07-09 20:12 Paul Honig Move switch between bootstrap and emulator to one commitdiff tree tar/gz zip patch
2019-07-06 14:10 Paul Honig Simplified the code, and removed the bs_state_next commitdiff tree tar/gz zip patch
2019-07-02 19:18 Paul Honig Fixed some warnings. Makefile changed, make and ma commitdiff tree tar/gz zip patch
2019-06-24 18:23 Paul Honig When CIA2 delay the interrupt one cycle, when CIA1 commitdiff tree tar/gz zip patch
2019-06-01 12:14 Paul Honig Fixed timing issue where timer stopped one cycle t commitdiff tree tar/gz zip patch
2019-05-28 11:52 Paul Honig Fixed TOD clock, hour and am/pm handling implement commitdiff tree tar/gz zip patch
2019-05-12 13:29 Paul Honig Made the code more easy to read, for future mainte commitdiff tree tar/gz zip patch
2019-05-06 19:50 Paul Honig Speed up transfers using the RS232 interface, by u commitdiff tree tar/gz zip patch
2019-05-06 18:04 Paul Honig Remove double % from run-test.py. commitdiff tree tar/gz zip patch
2019-05-05 20:46 Paul Honig Beautified the test and program Python scripts. Pr commitdiff tree tar/gz zip patch
2019-05-05 12:54 Paul Honig Merge branch 'newsid' commitdiff tree tar/gz zip patch
2019-05-05 12:53 Paul Honig New changes made to the SID chip code in the 1541 newsid commitdiff tree tar/gz zip patch
2019-05-05 08:39 Paul Honig Implementation of new CIA chip model with split infreshcia commitdiff tree tar/gz zip patch
2019-05-05 08:38 Paul Honig Remove windows \r characters. commitdiff tree tar/gz zip patch
2019-05-05 08:37 Paul Honig Print help when no arguments are given commitdiff tree tar/gz zip patch
2019-05-05 08:21 Paul Honig Remove sudo as an udev rule is used to flash the R commitdiff tree tar/gz zip patch
2019-04-20 21:06 Paul Honig Fixed status registers reset when isr is read on i commitdiff tree tar/gz zip patch
2019-04-20 14:49 Paul Honig Add one extra cycle when starting the timer. This commitdiff tree tar/gz zip patch

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Date Branch Actions
2019-07-13 19:49 bootstrap
2018-04-08 21:27 framebuffer
2019-05-05 08:39 freshcia
2019-10-01 18:37 master
2019-05-05 12:53 newsid
2018-03-04 20:38 original_sid
2018-04-19 21:42 sd2iec
2018-03-16 23:12 ultisid